Networking for AI#

Remi Locherer - Arista Networks

• Why: AI training/inference clusters are the hardest physical datacenter networking problem of the moment, and this is a dense technical walkthrough of the fabric design decisions: lossless Ethernet, load balancing, topology, optics, and power. Directly in the PM's physical-DC wheelhouse (RoCE/lossless fabrics, optics, topology).
• What: A structured treatment of why AI traffic breaks traditional DC design — few, large, long-lived, highly synchronized flows; bursts at 100% of link rate with no stat-muxing; a single loss or XPU failure halts the whole job — followed by concrete scale-out designs, congestion control, load balancing evolution, and the Ultra Ethernet / MRC trends, plus the optics and cooling consequences.
• How: Covers RoCEv2 framing and why "converged Ethernet" means lossless Ethernet (PFC hop-by-hop on ingress, ECN end-to-end, DCQCN). Explains why ECMP fails on low-entropy XPU-to-XPU flows (collisions, out-of-order delivery on link flap) and the progression from RDMA-aware hashing to dynamic and cluster-aware load balancing. Compares fat-tree vs planar/rail topologies (flexibility vs fiber cost and 1:1 bandwidth), gives per-tier XPU-count design tables up to ~660k hosts on multi-planar 7060XE7 fabrics, and covers UET packet spraying, packet trimming (64B trimmed frames as fast congestion signals), and the OpenAI-led Multipath Reliable Connection (MRC) OCP transport spec. Finishes with the physical layer: LPO transceivers (≤8W vs 14-16W, ~50% power reduction, 9x lower latency), liquid cooling, and XPO extra-dense pluggable optics for 204.8T in 1OU.
• Where applicable: AI backend/scale-out fabric design generally; the concepts (lossless forwarding, entropy, oversubscription, power-as-constraint) transfer to any DC operator. Note it is an Arista session and the design tables are Arista-platform-specific (7060X6/7800R4/7060XE7), but the vast majority of the content is protocol- and silicon-generic, not a disguised pitch.