One Control Plane, Many DPU/IPUs: SONiC DASH and Open DSE Powered by OPI - Serey Kong, Intel Corporation & Mounire El Houmaidi, BE-NET#

Speakers: Serey Kong, Tech Lead - Driver Architect, Intel Corporation; Mounire El Houmaidi, BE-NET

• Why: Heterogeneous DPU racks are becoming normal, and today each vendor's SDK drags its own control surface with it. This session demonstrates two working PoCs for the problem — translating a NOS control plane into vendor-neutral OPI APIs, and reconciling state across four vendors' DPUs — which is the central question for anyone planning multi-silicon DPU fleets.
• What: Two proof-of-concepts. (1) An in-process SAI-to-OPI adapter (libsai_opi_adapter.so) that translates SONiC DASH overlay objects — ENI, VNet, ACL — directly into OPI gRPC calls, keeping proprietary vendor SDKs confined to the DPU SoC so the host control plane stays uniform across mixed-vendor racks. (2) Open DSE, an intent-driven framework that executes workloads across NVIDIA, Intel, AMD, and Marvell DPUs, using OPI to reconcile state and — notably — to distinguish functional connectivity from true hardware offload, i.e. to verify offload actually happened rather than being emulated in software. (from abstract only)
• How: The adapter pattern maps SONiC's SAI object model onto OPI's gRPC northbound API; Open DSE drives intent across heterogeneous DPUs and uses OPI state reconciliation as the ground truth for whether offload is genuine. This is the software-offload trap in disguise — a NIC can accept the API and still do the work on the host — so the verification distinction is a genuinely practical contribution.
• Where applicable: The SAI adapter is tied to SONiC DASH deployments; Open DSE spans NVIDIA, Intel, AMD, and Marvell silicon per the abstract. These are PoCs, so treat multi-vendor coverage as demonstrated-in-lab rather than production-hardened, but the architecture (vendor SDKs isolated on the SoC, one gRPC northbound) is broadly applicable and aligns with where the OPI project is heading.