Networking Headless CXL Devices for AI Memory Services#

Vijay Inavolu, Gaurav Agarwal

Why: A genuinely surprising construction: giving a CXL memory device — which exposes a memory window, not a NIC — a cluster-facing service identity, using nothing but stock kernel pieces.

What: A virtual L3 interface that carries IP over a shared CXL memory window, so services running on a CXL Type-2 device (Redis, KV-cache managers, Milvus query nodes) get IP-reachable endpoints and Kubernetes service identity.

How: Host and device daemons each open /dev/net/tun, configure a virtual L3 interface and mmap the same CXL HDM-H window as a shared packet ring, with ordering rules to carry packets reliably over memory; a host-pod bridge pattern gives the device-side Linux a service IP so clients never see the memory window. ping, ssh, Redis and TCP services work end to end with no new module. Reported: 60x less host-link traffic than a host-side compute path, and 2.56x FAISS vector-search throughput scaling across four cards. (From abstract only.)

Where applicable: CXL Type-2 "smart memory" hardware, which is rare today — but the pattern (network identity for a device that has no network) is the interesting part.