IP Fast Reroute for AI/ML Fabrics#

Francois Clad, Clarence Filsfils (Cisco), Roy Jiang, Dennis Cai

• Why: AI backend networks lose huge compute value per millisecond of fabric failure; existing FRR (ECMP, LFA, TI-LFA) is CPU-activated and orders of magnitude too slow, plus it can't react to capacity/quality degradation (e.g., a failed bundle member or a down spine-to-super-spine path causing congestion rather than outage).
• What: A requirements document for sub-100µs convergence in AI DC fabrics and DCI: it enumerates the limits of RFC 5714 mechanisms in large multi-tier Clos and BGP-only fabrics, and lays out what a replacement needs.
• How: Four requirements: (1) hardware-accelerated protection activation using extended NPU capabilities without CPU intervention; (2) hardware-accelerated network notifications (the FANTEL discussion, draft-ietf-rtgwg-net-notif-ps, draft-camarillo-rtgwg-lsn); (3) complete topology visibility via BGP-LS in BGP-only fabrics (the draft above); (4) quality-aware remote protection — reacting to remote degradation by adjusting ECMP weights or using repair paths outside the ECMP set (solution sketched in draft-clad-rtgwg-efficient-remote-protection).
• Where applicable: Scale-out AI backend networks (⅔-tier folded Clos, multi-plane/multi-rail, eBGP) and scale-across DCI; scale-up explicitly deferred. Requirements stage — individual draft seeking WG feedback; this is the umbrella over several companion solution drafts rather than a deployable mechanism itself.